This contribution will present measurements of non-irradiated and irradiated test structures at different fluences. The TSs have been irradiated with protons and neutrons to emulate the radiation damage caused by the particle fluence inside the future CMS tracker after 10 years of operation. They enable the extraction of parameters which are not accessible in a silicon detector and allow the assessment of the quality of the sensors produced on the same wafer. These TSs consist of different microelectronic devices including diodes, resistors or MOS structures. These wafers were produced by an industrial supplier (Hamamatsu Photonics K.K.) and differ by their bulk material (Float Zone, Magnetic Czochralski and CVD-Epi), thickness (from 50 μ m to 320 μ m) and N–P type doping. Several different test structures (TSs) and sensors have been designed for a 6 in.
NUCLEAR TIME NSYNC UPGRADE
This upgrade is needed to be able to cope with the higher radiation background of the future HL-LHC additionally the performance of the current tracker will be significantly degraded at the time of the upgrade, requiring a replacement. The CMS collaboration is currently conducting a campaign to identify radiation-hard materials for an upgrade of the CMS tracker. Finally the first ever performance results of single gap glass based RPC using HARDROC as front end electronics are presented. The study incorporates the various calibration tests concerning the different parameters of HARDROC. In order to cope up with enormous number of electronics channels, a multichannel based front end ASIC namely HARDROC has been tested and commissioned. The complete readout of the ICAL detector requires the implementation of millions of electronic readout channels. The ICAL RPC will have two dimensional readout and comprising of 64 readout channels in each plane. The ICAL geometry is going to utilize about 29000 single gap Resistive Plate Chambers (RPCs) as triggering and tracking elements. The magnetized Iron Calorimeter (ICAL) detector is the primary experiment in this facility and is going to shed light on many important issues related to the atmospheric neutrinos.
The India based Neutrino Observatory (INO) is an multi institutional facility that involves the construction of a underground laboratory for the basic research in neutrino physics. The nSYNC has been completely tested, also within the nODE board, and is now in the production phase. We have described the nSYNC ASIC which is the main component of the upgraded LHCb muon detector, implementing synchronization and time measurements. TDC uniformity test, performed by impulsing all TDC channels with a synchronous input and through an adjustable delay to scan the whole time interval, shows a missing hit inefficiency of 0.4% and a wrong clock cycle assignment of 0.5%, as shown in Fig. 2a in the extreme bins.
NUCLEAR TIME NSYNC CODE
First, the TDCs automatic calibration procedure has been tested and shows, for all resolutions, the right DCO code value and uniformity between different channels. The TDC can work with several time resolutions, i.e. the number of slices on which nSYNC test The main core of the TDC is a fully digital patented DCO ,, equipped also with a dithering system to reduce the systematic error of the digital delay chain. In each of the 48 LVDS input channels, the arrival time of the signal, in particular the phase with respect to the LHC 40 MHz clock, is measured by a TDC. The nSYNC architecture is composed of several functional blocks, schematically shown in Fig. 1. It receives the digital signals from the Front-End Boards (FEB), in which the signals from the muon chambers have been already amplified, shaped, discriminated and logically combined, and performs the time alignment and properly formatting to send them to the readout system.įour nSYNC chips will be placed in the new Off Detector Electronics (nODE) board, which will replace the current ODE, equipped with the GBT (GigaBit Transceiver) chipset for data serialization, and the Versatile Link for the optical communication system. In particular, for the upgraded Muon Detector the nSYNC chip, a custom ASIC in UMC 130 nm technology, has been developed as an evolution of the current SYNC chip .
To comply the new operating conditions a re-design of most of the readout electronics on each sub-detector had been necessary. This will allow to collect an integrated luminosity of 50 fb −1 in 5 years of activity. The 2019 upgrade of the LHCb experiment foresees to collect data at an instantaneous luminosity of 2 ⋅ 1 0 33 cm −2 s −1, with a new readout scheme running without an hardware trigger at 40 MHz.
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